1. Field of the Invention
This invention relates to video display systems, and more particularly to power reduction by management of the clocks in a video display controller.
2. Description of the Related Art
Display systems are a vital part of most personal computer systems. Graphic displays provide flexibility in sending information to the computer user and may increase the ease-of-use of the computer. However, the power used by such a display can be a large portion of the total power consumed by a computer system. This is especially true for battery-powered portable systems such as laptop, notebook, and hand-held computers, and personal-digital assistants (PDA's). Reducing the power consumption of the display sub-system allows for a smaller, lighter-weight battery to be used, or for longer battery life.
FIG. 1 is a diagram of a display, which could be a cathode-ray-tube (CRT) video display, or a flat-panel liquid-crystal display (LCD) or other type of display. An image is formed on the display screen by selectively energizing or illuminating small dots or pixels on the screen. In a CRT, a pixel is energized by an electron gun that directs a beam of energizing electrons to a particular point on the screen. The electron beam is scanned from left to right in a horizontal line and pulsed to illuminate some points on the line but not others. The screen is divided into a number of horizontal lines 10, 12, 16, with each line comprising a number of pixels. The pixels in a line are illuminated one-by-one from the left side to the right side of a horizontal lines 10, 12, 16.
Once the entire horizontal line 10, 12, 16 has been scanned, the electron beam is disabled or "blanked" so that no pixels are energized and the electron beam is re-traced back to the beginning on the next horizontal line 12. This horizontal re-trace 14 follows a diagonal path. After re-trace, the blanking is ended and the next horizontal line 12 is scanned. The process of scanning a horizontal line and re-tracing is repeated until all lines are scanned. Once scanning of the last horizontal line 16 is complete, the electron beam is returned to the beginning of the first line 10 by a vertical re-trace 18. The electron beam is again blanked to prevent any illumination while the electron beam is being retraced to the top of the screen.
Other display technologies also divide a screen into horizontal lines comprised of pixels that are either illuminated or not. A horizontal recovery or blanking period between horizontal lines and a vertical recovery or blanking period to return to the top of the screen may also be necessary with these display technologies, even though an electron beam is not used.
FIG. 2 is a waveform diagram showing a video clock 20 that is used to clock pixel data to a display. When horizontal blanking signal 22 is low, pixel data is clocked by video clock 20 to the display. However, when horizontal blanking signal 22 is high, pixel data is not clocked to the display. Instead, the electron beam is re-traced to the beginning of the next line. Likewise, when vertical blanking signal 24 is high, pixel data is not clocked to the display as vertical re-tracing is occurring. Thus during time period 10T, horizontal line 10 is being scanned and its pixels are being clocked to the display by the video clock 20. During horizontal re-trace period 14T, the pixels are not clocked to the display as horizontal re-trace 14 is in progress. Horizontal line 12 is scanned during period 12T, while the last horizontal line 16 is scanned during period 16T. Vertical re-trace 18 occurs during vertical blanking period 18T, and pixel data is not clocked to the display during this period 18T. Shading indicates time periods when pixel data is not being clocked to the display.
For clarity, FIG. 2 is not drawn to scale. Each line has many pixels, and many lines are in a screen. In a standard 640.times.480 resolution display, each of the 480 horizontal lines has 640 pixels, and each of these lines would require 640 video clock pulses to transmit the 640 pixels to the display. The screen is re-written or refreshed 60 times per second (60 Hz), and thus the vertical re-trace period occurs 60 times per second, while horizontal blanking occurs at a rate of 31.5 KHz: one line every 31.7 .mu.s. Pixels must be clocked to the display at a rate of 25.175 MHz, about one pixel every 40 ns.
A simple calculation reveals the magnitude of the blanking periods. The 640 pixels require 640.times.40 ns/pixel=27.2 .mu.s to scan. Thus horizontal blanking requires 31.7 .mu.s -27.2 .mu.s=4.5 .mu.s, or 4.5/31.7=14% of the horizontal scan time. Vertical blanking occurs once every 16.6 ms, while the 480 lines take 480.times.31.7 .mu.s=15.2 ms. Thus 16.6 ms-15.2 ms=1.4 ms is spent just on vertical blanking and re-tracing, or 1.4/16.6=8% of the total refresh cycle. While clocking pixels to the display requires 640.times.480.times.40 ns=12.3 ms, horizontal and vertical blanking occupy the remaining 4.3 ms. Thus the time when pixels are not being written to the display screen is 4.3/16.6=26% of the total time!
Pixel data is stored in a video memory and transferred to the display through a video FIFO buffer. The video FIFO buffer can buffer many pixels, perhaps one or more horizontal lines of pixels, or only a fraction of a horizontal line. A memory clock, MCLK 30, clocks pixel data from the video memory to the video FIFO buffer. Strobe 32 is low when pixel data is being transferred to the video FIFO buffer. Strobe 32 goes low one or more times for every horizontal line, filling the video FIFO buffer before the horizontal line is scanned. A host may update what is displayed by writing data to the video memory using a bus clock, BCLK 40. A host strobe 42 indicates when update data is to be written to the video memory. The update data is first written to a buffer or FIFO before being written to the video memory, allowing the bus clock 40 and the memory clock 30 to be different frequencies and asynchronous to each other. Likewise, the video FIFO buffer allows the video clock 20 and the memory clock 30 to be asynchronous to each other and at different frequencies.
For much of the time in a typical portable computer system, the user is simply looking at the screen and the computer's processor and other sub-systems are performing no useful operations. It is therefore desired to reduce power consumption of the display sub-system while the display is active by disabling certain clocks in the display sub-system when not in use, but enabling these clocks when necessary to refresh the display screen, or to perform other functions such as BLT block transfers, DRAM refresh, or host transfers.
What is desired is a video display sub-system with reduced power consumption. It is desired to manage the various clocks and to disable them when they are not needed.